I thought that microprocessor production and design was fraught with risk of infringing on other designers' patents (even for original ISAs). I can see that industry heavyweights have arrived to support RISC-V, so hopefully that comes with a team of professors/lawyers that could defend them. But, why now? Why couldn't this have happened sooner? Didn't Sun try to create an open SPARC processor design? What does RISC-V have that it didn't?
Is the intent for RISC-V to compete with modern high-end CPU designs, or do we just want to have royalty-free microprocessors for our embedded devices?
You might be surprised (at least I was) to learn that peripherals like hard drives and PCI-add-in cards usually have their own CPU executing their own software. Those processors are often MIPS/ARM/etc based and the manufacturer has to shell out to someone to be able to use that, even if they designed the processor themselves. I can see how this particular market is ripe for something like RISC-V. But does anyone expect RISC-V to really go head-to-head with Xeon, Opteron, ThunderX, Centriq?
I sound incredulous because this seems surprising to me, but I have no evidence to suggest whether it's as unlikely as I think. I've certainly seen open source software designs far superior to closed source ones, so maybe hardware design is no different?
The RISC-V team was very careful in establishing prior art for every design decision. The patents on ISAs tend to be on their quirks, so keeping things truly minimal helps avoid all of that complexity.
Like a lot of what Sun did, prior open chip designs weren't good enough. Academics starting with a clean slate and a 20+ years of additional experience gives RISC-V real advantages over MIPS and ARM.
The primary advantage is that RISC-V is truly RISC: they have a core ISA that is frozen but extendable. This means that they can have application-specific CPUs with intelligent fallback and full compatibility.
As to why now, well, they came up with RISC-V as a teaching ISA and started getting emails from industry asking why it had changed from last semester. It turns out that chip manufacturing has gotten cheap, with custom runs on 28nm processes going for $30K.
You are correct in that their early target market are co-processors and other niche components. Just getting a license from ARM is 10+ million dollars. But the biggest cost in building your own ISA is investment in software and tooling. RISC-V gives a common foundation for everyone to build on.
However, their intent is indeed to bring competition at every level. Their licensing scheme was chosen specifically to allow big players to create IP and keep the secret sauce to themselves, unlike SPARC V8 and OpenRISC.
Apple creates their own CPU and GPU designs, Google has custom hardware for machine learning, and Samsung is about to overtake Intel as the world's largest chip manufacturer. Why should they keep shelling out billions to ARM, Intel, and AMD just to use their ISA?
There are a number of things that make RISC-V different from OpenSPARC. One is that OpenSPARC is not a very scalable design, it could probably only ever work in servers and workstations, and workstations are essentially a monoculture.
Another reason is timing: manufacturing processes have effectively stopped yielding performance and power gains as the fundamental constraint (distance between components on chip) doesn't get any smaller. This means that in order to keep the pace up for any popular workload, many new microarchitectures will need to be created. RISC-V is amenable to a wide array of microarchitectural decisions, and doesn't carry the architectural baggage of ARM and MIPS licensing and technical quirks, or the impossible licensing of x86.
> But does anyone expect RISC-V to really go head-to-head with Xeon, Opteron, ThunderX, Centriq?
Except for Intel, none of these manufacturers have any reason to resist RISC-V. All of these vendors can directly port knowledge from one ISA to another. So really it becomes a matter of "will there be a demand for RISC-V hardware in the server and workstation markets?", and the answer to that is a firm "maybe".
I think that today, since most software is written in high level languages which are at least as abstract as C, there is little reason why a new ISA couldn't take hold in any of these markets if hardware vendors can promise good things to ISVs and to customers who write their own software.
At present, there is a considerable barrier to entry for new designers and manufacturers to approach ARM, POWER, and MIPS, and basically no hope of manufacturing an AMD64.
ARM is not the cuddly RISC architecture people think it is, it is in many ways nearly as quirky as x86, and therefore very expensive to enter and innovate on. Furthermore, it can take more than a year to negotiate an architectural license with ARM, your company or the market might no longer exist by the time you close the deal. POWER is not too far off on licensing, and it's not all that elegant either (though far more surmountable than ARM). MIPS lacks industry momentum and standardized high performance feature sets (wide vector compute, hardware security features), and its custodian company seems to barely acknowledge it exists.
All in all, nobody knows if it'll work out, but there are good reasons for RISC-V to succeed in the market. The challenges also seem surmountable.
> does anyone expect RISC-V to really go head-to-head with Xeon, Opteron, ThunderX, Centriq?
Yes, and no. RISC-V is disruptive [1] to both ARM and x86. But before it can run (compete with Intel CPUs), it needs to crawl (compete with low-end ARM CPUs/microcontrollers). It could take a decade or more before RISC-V competes at the high-end. Basically think of it as following ARM's path but on a much more accelerated path (for many different reasons: much larger chip market these days, being open source and royalty-free, etc).
You have a point, but I think there is a reasonable midpoint that Talos missed altogether. RISC-V's move towards RPi/Arduino style mini-systems lets them get a market going at a price point that has some chance to get some uptake early, and hopefully grow from there.
Talos seemed amazing, and I was always fond of the ppc/power architecture and wished for something more modern than an old G5 mac, but $7k for a desktop is just more than even most early adopters are willing to do.
Talos failed because Raptor tried to sell a high-end server in desktop clothing when the market called for maybe a PowerBook at most. They needed to start smaller with something lower-power.
The hole point of a free ISA is that many different people can produce them so that it will reach a economy of scale and chip producers will face competition making dirving down price.
AFAIK, most advanced RISC-V design includes superscalar and OoOE (e.g. comparable to a MIPS R10000 (1995) or an Intel Pentium Pro (1995)), while the RISC-V for the IoT is comparable to a typical single instructions per clock RISC CPU, e.g. MIPS R3000 (1988).
The success in the IoT will depend not only in a cheaper price because of no royalties, but also in the "ecosystem": peripherals, buses, etc. Running Linux is a huge start, so I have no doubt it can be a success in this field.
Regarding the use in mobile and desktop, it will have to wait until SIMD extensions are introduced, and software being adapted (e.g. ffmpeg/libav including RISC-V assembly SIMD implementation for the codecs).
Anyway, realistically, for the RISC-V getting enough traction, some big player should bet on that, which is currently highly improbable, unless some Apple/Samsung/Huawei/Google gets crazy enough for doing it.
>Regarding the use in mobile and desktop, it will have to wait until SIMD extensions are introduced
I'm little confused about this talk and comments in here relating to open source in high performance applications (desktop, servers etc).
The RISC-V ISA is open source, I get that. There can also be open source Verilog/VHDL designs available. They are probably good for small low performance IoT applications and old processes.
But there is long way from ISA to silicon in high performance VLSI processor design for a new processes and foundries. Architecture, logic synthesis, timing analysis, floor planning, routing and placement, and ungodly amount of testing .. I don't see anyone spending hundreds of millions of chip design for RISC-V ISA and open sourcing it.
In other words, if you want competitive RISC-V chip, some company must spend hundreds of millions to develop their own RISK-V chip architecture and they will not open source it.
I want to buy RISC-V, both to play with and to support the cause. What are my options like and should I buy something now or wait for the next generation?
The FPGA board can be used for other things too. If you are really adventurous, I'd suggest buying a FPGA board with better chip so you can fit in larger IP blocks in the future. It will work perfectly fine as a replacement for the above FPGA kit I've linked to.
My suggestion would be this[1]. It has a pretty large LUT count so you can go nuts. The RAM and Ethernet will be pretty useful if you want to run linux[2] and test out stuff. It'll be a bit hard to run linux on it right now.
On the other hand, you can choose a Parallela board[3] which comes with a FPGA chip along with a new (soon to be retired) arch called epiphany. Here[4] is a GSoC project which runs linux on that board using the FPGA.
People mentioned the siFive option, but that's a microcontroller. If you were looking for a 64 bit processor implementation, without having to use an FPGA...
It looks like the first dev board that would be capable of running linux will likely be the lowRISC project.
"We are expecting to crowdfund an initial instantiation of the lowRISC platform during the course of 2017"http://www.lowrisc.org/
You can buy the HiFive1 board (I have a few and they're swell), but it's more of a microcontroller than an application processor, the board is Arduino compatible. If you want something more like a Raspberry Pi or bigger, you'll have to wait a bit longer.
The Freedom Unleashed platform is coming down the pipe, and you can pre-evaluate it on an FPGA board (albeit at lower frequency, and fairly pricy since it's a complex design and requires a fairly large FPGA to prototype). I won't pretend to know when they'll have a standard Freedom U500 SoC dev board, but it will have multiple cores, PCIe 3.0, USB 3, Gigabit ethernet, and DDR4 compatibility according to their website[1].
Others have the SiFive chip, but if you want to boot Linux then your best option currently is running Rocket on an FPGA kit. I expect that we'll soon have more options. If you just want to play around, then I'd recommend Spike or Fabrice's https://bellard.org/riscvemu/
You can buy one from SiFive: https://www.crowdsupply.com/sifive/hifive1 although it's going to be a while until a RISC-V chip will be packaged on a board with USB, Ethernet, SATA, and all peripherals that make an ATX motherboard or a Raspberry Pi worth owning.
RISC-V is atleast 10 years away from competing with x86 and ARM. It is just now getting to a point where it can power arduino class hardware. Long way to go... but looks promising.
The Freedom E310 chip in the HiFive1 board is shipping today and is already competitive with embedded ARM: https://www.crowdsupply.com/sifive/hifive1/#comparisons. It's comically faster (i.e., 100x) than the AVR chip in the Arduino Uno board, but the similar form factor makes it cheap & easy for early adopters to play around with.
I'd bet that within five years a good proportion, even the majority, of Amazon & Google servers, will be running on RISC V chips.
As someone not knowledgeable about hardware, I really enjoyed reading Agner Fog's message board where he and others discuss creating a new open source instruction set: http://agner.org/optimize/blog/read.php?i=421
RISC-V is discussed some, and part of the discussion is how to improve it.
Running on a Zedboard is quite well documented; only took me a couple of hours to do it from scratch following their instructions: https://github.com/ucb-bar/fpga-zynq
I see on this thread a lot of people getting blind-folded by the "open-source" term attached to the headline of this article.
First of all RISC-V can mean more than one thing: it can refer to the architecture, which is in fact open and free to use, or it can refer to the implementation of the same architecture, which will not be necessarily free or open source. For example, check the so claimed SiFive company which was promising free and open source implementations of RISC-V: http://www.eetimes.com/document.asp?doc_id=1331690
"“A year ago there was quite a debate if people would license a core if there was a free version, [but now] we’ve seen significant demand for customers who don’t want an open-source version but one better documented with a company behind it,” said Jack Kang, vice president of product and business development at SiFive."
By the end of the day, they just decided to follow ARM's path by providing license fees to their CPUs.
Secondly, when people say that RISC-V is "free" and "open-source" and that will allow companies to create cheaper and more open hardware, that is just an illusion. There are many more things on a SoC other than a CPU (like memories, communication buses, GPUs, power management processors, and so on). Cutting costs on a CPU will not make the cost of an SoC go down to zero, the CPU is just a small part of the puzzle.
With RISC-V, you either need to implement the CPU yourself (which will be extremely expensive and time consuming) or you will have to find someone who provides with CPU cores already implemented. And of course that you need to have support and guarantees that the cores you bought will work on silicon. There will be always a huge cost associated when shipping CPUs, you can't escape from that.
You can already imagine that open-source hardware doesn't play by the same rules as open-source software, it's a completely different game with completely different rules.
And people speak of ARM's royalties like if they were a very bad thing. Truth to be told, the royalties you pay ARM can be a very good deal taking into account that you get access to silicon proven CPU cores, support from the best engineers in the industry and you automatically get covered by the many CPU patents that ARM owns.
And you can even choose on how you want to pay for ARM's CPU licenses: you can either choose to license an already implemented CPU design by ARM or you can buy an architectural license and implement your CPU completely from scratch (this is what Apple and Qualcomm are current doing). You don't need to be completely tied to ARM.
Even in the royalty fees you can choose whether you want to pay a big upfront license fee but then paying low royalties per device or you can choose to pay a low upfront license but compensating on the royalties per device.
There is a lot of misinformation going around the possibilities of RISC-V, mostly of this misinformation coming from people involved in the development of the spec. Don't be fooled by the buzzwords "open-source hardware" and "free hardware".
The point is that if you want to use the ARM ISA you have to pay ARM. Not so with RISC-V. Anyone is free to fab a RISC-V chip without paying royalties.
After enjoying coding on 680x0 in my youth and later being frustrated by x86, I acclaim that new ISA. There is a design decision I'm curious about but I could not find related information. How did they come with the names "x0, x1, x2..." for general purpose registers, instead of the more conventional "r0, r1, r2..."?
What is so special about reduced ISAs, what's the differentiating factors between them?
I mean they are so reduced that the ones I've seen are largely the same few logic ops. RAM access and interrupts might differ some, but a) memory access should follow the implementation and b) essentially everything else is memory mapped (avr, c51, pic)
So many RISC options and almost none for CISC. If you want yet another low power chip, then it makes sense. If, however, you want to get real on efficient cache usage and a high instruction-per-execution ratio, just do yourself a favor and stop ignoring the costly experimenting results that the industry already paid for.
This just doesn't match the research I've read. CISC wasn't about speed of execution, and x86 isn't an asset, there. (As I understand it Intel's expertise in compilers, emulation of CISC by RISC, and manufacturing are wonderful compensating factors.)
would there be a advantage to not only creating a reduced instruction set but a minimal instruction set and letting the compiler do the rest. especially when you can add a lot more cores, so that mul becomes a cpu core with a counter and add for example.
[+] [-] wyldfire|9 years ago|reply
Is the intent for RISC-V to compete with modern high-end CPU designs, or do we just want to have royalty-free microprocessors for our embedded devices?
You might be surprised (at least I was) to learn that peripherals like hard drives and PCI-add-in cards usually have their own CPU executing their own software. Those processors are often MIPS/ARM/etc based and the manufacturer has to shell out to someone to be able to use that, even if they designed the processor themselves. I can see how this particular market is ripe for something like RISC-V. But does anyone expect RISC-V to really go head-to-head with Xeon, Opteron, ThunderX, Centriq?
I sound incredulous because this seems surprising to me, but I have no evidence to suggest whether it's as unlikely as I think. I've certainly seen open source software designs far superior to closed source ones, so maybe hardware design is no different?
[+] [-] indolering|9 years ago|reply
Like a lot of what Sun did, prior open chip designs weren't good enough. Academics starting with a clean slate and a 20+ years of additional experience gives RISC-V real advantages over MIPS and ARM.
The primary advantage is that RISC-V is truly RISC: they have a core ISA that is frozen but extendable. This means that they can have application-specific CPUs with intelligent fallback and full compatibility.
As to why now, well, they came up with RISC-V as a teaching ISA and started getting emails from industry asking why it had changed from last semester. It turns out that chip manufacturing has gotten cheap, with custom runs on 28nm processes going for $30K.
You are correct in that their early target market are co-processors and other niche components. Just getting a license from ARM is 10+ million dollars. But the biggest cost in building your own ISA is investment in software and tooling. RISC-V gives a common foundation for everyone to build on.
However, their intent is indeed to bring competition at every level. Their licensing scheme was chosen specifically to allow big players to create IP and keep the secret sauce to themselves, unlike SPARC V8 and OpenRISC.
Apple creates their own CPU and GPU designs, Google has custom hardware for machine learning, and Samsung is about to overtake Intel as the world's largest chip manufacturer. Why should they keep shelling out billions to ARM, Intel, and AMD just to use their ISA?
[+] [-] microcolonel|9 years ago|reply
> But does anyone expect RISC-V to really go head-to-head with Xeon, Opteron, ThunderX, Centriq?
Except for Intel, none of these manufacturers have any reason to resist RISC-V. All of these vendors can directly port knowledge from one ISA to another. So really it becomes a matter of "will there be a demand for RISC-V hardware in the server and workstation markets?", and the answer to that is a firm "maybe".
I think that today, since most software is written in high level languages which are at least as abstract as C, there is little reason why a new ISA couldn't take hold in any of these markets if hardware vendors can promise good things to ISVs and to customers who write their own software.
At present, there is a considerable barrier to entry for new designers and manufacturers to approach ARM, POWER, and MIPS, and basically no hope of manufacturing an AMD64. ARM is not the cuddly RISC architecture people think it is, it is in many ways nearly as quirky as x86, and therefore very expensive to enter and innovate on. Furthermore, it can take more than a year to negotiate an architectural license with ARM, your company or the market might no longer exist by the time you close the deal. POWER is not too far off on licensing, and it's not all that elegant either (though far more surmountable than ARM). MIPS lacks industry momentum and standardized high performance feature sets (wide vector compute, hardware security features), and its custodian company seems to barely acknowledge it exists.
All in all, nobody knows if it'll work out, but there are good reasons for RISC-V to succeed in the market. The challenges also seem surmountable.
[+] [-] mtgx|9 years ago|reply
Yes, and no. RISC-V is disruptive [1] to both ARM and x86. But before it can run (compete with Intel CPUs), it needs to crawl (compete with low-end ARM CPUs/microcontrollers). It could take a decade or more before RISC-V competes at the high-end. Basically think of it as following ARM's path but on a much more accelerated path (for many different reasons: much larger chip market these days, being open source and royalty-free, etc).
[1] - https://www.youtube.com/watch?v=mbPiAzzGap0
[+] [-] filereaper|9 years ago|reply
I've pretty much given up hope on a non-x86 based chip hitting our desktops, the closest to reach will be ARM.
The economies of scale aren't there, I pretty much end up rolling my eyes at each of these articles.
[1] https://www.raptorengineering.com/TALOS/prerelease.php
[+] [-] abeyer|9 years ago|reply
Talos seemed amazing, and I was always fond of the ppc/power architecture and wished for something more modern than an old G5 mac, but $7k for a desktop is just more than even most early adopters are willing to do.
[+] [-] yellowapple|9 years ago|reply
[+] [-] unknown|9 years ago|reply
[deleted]
[+] [-] nickik|9 years ago|reply
Its not garantied to work but its a worty target.
[+] [-] faragon|9 years ago|reply
The success in the IoT will depend not only in a cheaper price because of no royalties, but also in the "ecosystem": peripherals, buses, etc. Running Linux is a huge start, so I have no doubt it can be a success in this field.
Regarding the use in mobile and desktop, it will have to wait until SIMD extensions are introduced, and software being adapted (e.g. ffmpeg/libav including RISC-V assembly SIMD implementation for the codecs).
Anyway, realistically, for the RISC-V getting enough traction, some big player should bet on that, which is currently highly improbable, unless some Apple/Samsung/Huawei/Google gets crazy enough for doing it.
[+] [-] Nokinside|9 years ago|reply
I'm little confused about this talk and comments in here relating to open source in high performance applications (desktop, servers etc).
The RISC-V ISA is open source, I get that. There can also be open source Verilog/VHDL designs available. They are probably good for small low performance IoT applications and old processes.
But there is long way from ISA to silicon in high performance VLSI processor design for a new processes and foundries. Architecture, logic synthesis, timing analysis, floor planning, routing and placement, and ungodly amount of testing .. I don't see anyone spending hundreds of millions of chip design for RISC-V ISA and open sourcing it.
In other words, if you want competitive RISC-V chip, some company must spend hundreds of millions to develop their own RISK-V chip architecture and they will not open source it.
[+] [-] homero|9 years ago|reply
[+] [-] DonbunEf7|9 years ago|reply
[+] [-] ktta|9 years ago|reply
https://dev.sifive.com/freedom-soc/evaluate/fpga/
The FPGA board can be used for other things too. If you are really adventurous, I'd suggest buying a FPGA board with better chip so you can fit in larger IP blocks in the future. It will work perfectly fine as a replacement for the above FPGA kit I've linked to.
My suggestion would be this[1]. It has a pretty large LUT count so you can go nuts. The RAM and Ethernet will be pretty useful if you want to run linux[2] and test out stuff. It'll be a bit hard to run linux on it right now.
On the other hand, you can choose a Parallela board[3] which comes with a FPGA chip along with a new (soon to be retired) arch called epiphany. Here[4] is a GSoC project which runs linux on that board using the FPGA.
[1]: http://store.digilentinc.com/nexys-4-ddr-artix-7-fpga-traine... [2]: https://github.com/riscv/riscv-linux [3]: https://www.parallella.org/ [4]: https://github.com/eliaskousk/parallella-riscv
[+] [-] tyingq|9 years ago|reply
It looks like the first dev board that would be capable of running linux will likely be the lowRISC project.
"We are expecting to crowdfund an initial instantiation of the lowRISC platform during the course of 2017" http://www.lowrisc.org/
[+] [-] microcolonel|9 years ago|reply
The Freedom Unleashed platform is coming down the pipe, and you can pre-evaluate it on an FPGA board (albeit at lower frequency, and fairly pricy since it's a complex design and requires a fairly large FPGA to prototype). I won't pretend to know when they'll have a standard Freedom U500 SoC dev board, but it will have multiple cores, PCIe 3.0, USB 3, Gigabit ethernet, and DDR4 compatibility according to their website[1].
[1]: https://www.sifive.com/products/freedom/
[+] [-] FullyFunctional|9 years ago|reply
Others have the SiFive chip, but if you want to boot Linux then your best option currently is running Rocket on an FPGA kit. I expect that we'll soon have more options. If you just want to play around, then I'd recommend Spike or Fabrice's https://bellard.org/riscvemu/
[+] [-] wanderingjew|9 years ago|reply
[+] [-] pmorici|9 years ago|reply
https://www.sifive.com/products/hifive1/
[+] [-] ddcc7|9 years ago|reply
[+] [-] deepnotderp|9 years ago|reply
[+] [-] webaholic|9 years ago|reply
[+] [-] jbarham|9 years ago|reply
I'd bet that within five years a good proportion, even the majority, of Amazon & Google servers, will be running on RISC V chips.
[+] [-] legulere|9 years ago|reply
[+] [-] pubby|9 years ago|reply
RISC-V is discussed some, and part of the discussion is how to improve it.
[+] [-] blitmap|9 years ago|reply
[+] [-] zanny|9 years ago|reply
[+] [-] monk_e_boy|9 years ago|reply
[+] [-] deepnotderp|9 years ago|reply
[+] [-] figers|9 years ago|reply
[+] [-] wyager|9 years ago|reply
[+] [-] alkoumpa|9 years ago|reply
[+] [-] sidereal|9 years ago|reply
[+] [-] sweden|9 years ago|reply
First of all RISC-V can mean more than one thing: it can refer to the architecture, which is in fact open and free to use, or it can refer to the implementation of the same architecture, which will not be necessarily free or open source. For example, check the so claimed SiFive company which was promising free and open source implementations of RISC-V: http://www.eetimes.com/document.asp?doc_id=1331690
"“A year ago there was quite a debate if people would license a core if there was a free version, [but now] we’ve seen significant demand for customers who don’t want an open-source version but one better documented with a company behind it,” said Jack Kang, vice president of product and business development at SiFive."
By the end of the day, they just decided to follow ARM's path by providing license fees to their CPUs.
Secondly, when people say that RISC-V is "free" and "open-source" and that will allow companies to create cheaper and more open hardware, that is just an illusion. There are many more things on a SoC other than a CPU (like memories, communication buses, GPUs, power management processors, and so on). Cutting costs on a CPU will not make the cost of an SoC go down to zero, the CPU is just a small part of the puzzle. With RISC-V, you either need to implement the CPU yourself (which will be extremely expensive and time consuming) or you will have to find someone who provides with CPU cores already implemented. And of course that you need to have support and guarantees that the cores you bought will work on silicon. There will be always a huge cost associated when shipping CPUs, you can't escape from that.
You can already imagine that open-source hardware doesn't play by the same rules as open-source software, it's a completely different game with completely different rules.
And people speak of ARM's royalties like if they were a very bad thing. Truth to be told, the royalties you pay ARM can be a very good deal taking into account that you get access to silicon proven CPU cores, support from the best engineers in the industry and you automatically get covered by the many CPU patents that ARM owns. And you can even choose on how you want to pay for ARM's CPU licenses: you can either choose to license an already implemented CPU design by ARM or you can buy an architectural license and implement your CPU completely from scratch (this is what Apple and Qualcomm are current doing). You don't need to be completely tied to ARM. Even in the royalty fees you can choose whether you want to pay a big upfront license fee but then paying low royalties per device or you can choose to pay a low upfront license but compensating on the royalties per device.
There is a lot of misinformation going around the possibilities of RISC-V, mostly of this misinformation coming from people involved in the development of the spec. Don't be fooled by the buzzwords "open-source hardware" and "free hardware".
[+] [-] jbarham|9 years ago|reply
The point is that if you want to use the ARM ISA you have to pay ARM. Not so with RISC-V. Anyone is free to fab a RISC-V chip without paying royalties.
[+] [-] psydk|9 years ago|reply
[+] [-] _chris_|9 years ago|reply
[+] [-] posterboy|9 years ago|reply
I mean they are so reduced that the ones I've seen are largely the same few logic ops. RAM access and interrupts might differ some, but a) memory access should follow the implementation and b) essentially everything else is memory mapped (avr, c51, pic)
[+] [-] restalis|9 years ago|reply
[+] [-] Nomentatus|9 years ago|reply
[+] [-] unknown|9 years ago|reply
[deleted]
[+] [-] jbarham|9 years ago|reply
[+] [-] silur|9 years ago|reply
[+] [-] unknown|9 years ago|reply
[deleted]
[+] [-] roryisok|9 years ago|reply
[+] [-] jlebrech|9 years ago|reply
[+] [-] FullyFunctional|9 years ago|reply
[+] [-] sajattack|9 years ago|reply
[deleted]