top | item 16842693 (no title) adraenwan | 7 years ago CISC in a nutshell discuss order hn newest Const-me|7 years ago Same for RISC: https://developer.arm.com/technologies/neon/intrinsics mmozeiko|7 years ago I would not call ARM a RISC. What is RISC in your opinion? Lack of memory addressing except load and store? Not true for ARMv8.1. Lack of microops? ARM1 (from 1985) has microops. load replies (1) blattimwind|7 years ago I guess that's why all high performance CPUs of the last twenty years have something like this.
Const-me|7 years ago Same for RISC: https://developer.arm.com/technologies/neon/intrinsics mmozeiko|7 years ago I would not call ARM a RISC. What is RISC in your opinion? Lack of memory addressing except load and store? Not true for ARMv8.1. Lack of microops? ARM1 (from 1985) has microops. load replies (1)
mmozeiko|7 years ago I would not call ARM a RISC. What is RISC in your opinion? Lack of memory addressing except load and store? Not true for ARMv8.1. Lack of microops? ARM1 (from 1985) has microops. load replies (1)
blattimwind|7 years ago I guess that's why all high performance CPUs of the last twenty years have something like this.
Const-me|7 years ago
mmozeiko|7 years ago
blattimwind|7 years ago