[mozumder]

Die size is ridiculous, causing such high prices due to exponential costs associated with die size. It seems like an opening for AMD to use their EPYC Infinity Fabric interconnect for their next-gen GPUs in multi-chip modules with smaller dies.

[tasty_freeze]

Die prices rise exponentially with area if your product requires a flawless die. But in architectures where bad subsections can get mapped out, such as GPUs and multicore CPUs, the price rise is not exponential.

[TomVDB]

Kepler GPU die sizes were pretty small. Maxwell die sizes on the same process were much larger. (Up to 600mm2.)

Pascal die sizes were pretty small. The Turing die size is much larger on (essentially) the same process.

You’re seeing the power of improving yields as the process matures.

It’s likely that a 7nm chip with the same functionality as this one would cost more for the foreseeable future, so it makes sense to make it this big.

The BW of the infinity fabric is but a fraction of what’s needed for a GPU, so that’s a total non-starter.

[jdietrich]

It's smaller than Volta, but that isn't saying much - as far as I can tell, Volta is the biggest commercially-produced processor die ever.

https://arstechnica.com/gadgets/2017/05/nvidia-tesla-v100-gp...