Being able to observe all inputs sources at the same time requires extra hardware(more utilisation of the FPGA resources), considering only one input is connected to the display at a time. So it's probable that the check is sequential.
"More" isn't a meaningful qualifier without a quantifier. I'm not convinced that it would take more than $0.01 worth of resource. I could even see doing it in a purely analog fashion with an extremely basic component like a mosfet. If a pin goes high because the computer responded to your request to send electrons, it sets the corresponding channel.
> So it's probable that the check is sequential.
It's a user unfriendly design for the process to be "send request, wait 5 seconds, send request on next channel, wait 5 seconds, send request on next channel, ..." when it could instead be sending requests across all channels rapidly and then that getting a response on a particular channel _activates_ that channel by analogue means.
I know you’re just guessing, but if that’s what happens, why don’t they just default to the last source used and start the cycling only if nothing is detected there?
ebg13|6 years ago
> So it's probable that the check is sequential.
It's a user unfriendly design for the process to be "send request, wait 5 seconds, send request on next channel, wait 5 seconds, send request on next channel, ..." when it could instead be sending requests across all channels rapidly and then that getting a response on a particular channel _activates_ that channel by analogue means.
lazyjones|6 years ago