Intel Reinvents Transistors Using New 3-D Structure

[pilom]

Again one of those "I bet AnandTech has the best description out there" and I go check and am pleasantly surprised.

http://www.anandtech.com/show/4313/intel-announces-first-22n...

[dreish]

Ah, but PC Magazine has "9 things you need to know" about it, which includes an incorrect explanation of what a nanometer is. I think it's in a sidebar next to their "38 makeup tips for the summer" article.

[sjtgraham]

This is the sort of thing I read and think to myself "go check HN comments where someone smart will explain this in layman's terms"

[svjunkie]

Agreed. It's all magic to me but it seems like, if this breakthrough can keep Moore's Law chugging, it's worth a pretty penny. I'm surprised their stock isn't up more today.

[Symmetry]

Awesome! The current a transistor can put out is porportional to the width over the length and chip designers usually want wide transistors[1], but wide transistors take up space which causes more line capacitance. This innovation will let people put more, wider transistors in a given area which will both increase the current they're putting out and decrease the capacitance they're fighting against, leading to higher frequencies[2].

[1] Wider transistors also cause more capacitance for the other transistors that are driving them, but for most modern designs this is smaller than line capacitance.

[2] Having transistors closer together can also help overcome speed-of-light delay. This can be important in caches.

EDIT: Also, some stuff I didn't notice until reading the Anandtech article is that the thinness of the silicon will give you the same artificial limitation of the depletion region that SOI does, leading to the same accelerated inversion. Oh, and better isolation from the base too. I don't think that I can explain that succinctly for non-EEs so go read Wikipedia on MOSFETs if you're interested.

[daeken]

> Having transistors closer together can also help overcome speed-of-light delay. This can be important in caches.

But in this case, while they take up less space, the distance is the same -- they're simply traveling up and over, rather than just over. Unless I'm missing something here.

[jws]

This Intel R&D paper sums the technology up and has a picture that makes it clear what they are doing: http://www.intel.com/technology/silicon/integrated_cmos.htm

In a nutshell, the drain/source is a tall trace, the gate approaches from the side and climbs over the drain/source, covering it on three sides.

[ableal]

The good stuff (discretely linked from the press release) is here: http://newsroom.intel.com/docs/DOC-2032 . In particular, this PDF has color drawings of the devices, and SEM pictures: http://download.intel.com/newsroom/kits/22nm/pdfs/22nm-Detai...

It is as you said - instead of the gate controlling the flow in a shallow ditch (the old "2D" does have some depth ;-), they built up a pipe and the gate is the choke around it.

Well, that should help stem the pesky leakage current problems that plague the deep sub-micron technologies ...

[tspiteri]

The New York Times has an article: http://www.nytimes.com/2011/05/05/science/05chip.html

The article links to some graphics: http://www.nytimes.com/imagepages/2011/05/05/science/05chip_...

[sosuke]

I liked Engadget's coverage of the release http://www.engadget.com/2011/05/04/intel-will-mass-produce-2...

I'm a sucker for videos. This Tri-Gate tech was first announced in 2002, I love seeing pie in the sky technology come into reality and widespread usage.

[riffraff]

the videos are at the same time incredibly good and incredibly bad, thanks :)

[stephenjudkins]

From what I've heard, using 50% as much power for the same performance as the previous generation still will not be sufficient to bring Intel's Atom performance/energy consumption ratio to that offered by ARM chips. However, it's a huge leap in the right direction. Add better-designed power-saving features on the next generation of Atom chips, and future process shrinkages, and it's easy to see ARM's lead getting chipped away until it's gone.

[ajross]

This is orthogonal. An ARM Cortex (or GPU, or whatever) on this process would see similar gains.

It's also worth pointing out that current Atoms in the market are still 45nm parts, not even 32nm. Intel, for obvious reasons, tends to prioritize production of high-margin desktop and server CPUs over low-margin embedded parts.

Really, this announcement isn't about ARM-based vs. Intel-based SoC designs. I think it's clear that Intel has some catching up to do there. This is about Intel cementing and extending its complete and total dominance of high end digital logic fabrication. At this point they look to be about a full two years ahead of everyone else. AMD, IBM, Samsung, TI, TSMC and the rest of that crew have to be more than a little worried.

Objectivity disclaimer: my wife is at Intel working on precisely this 22nm process. So I'm about as biased a source as you can find.

[nextparadigms]

Atom is 2 generations behind in the manufacturing process compared to this. They'll barely start making them at 32 nm next year, and that will last for another 2 years.

[SlipperySlope]

Interesting that Intel is seeking to fabricate ARM chips for Apple. I presume that Intel is pitching their best lithography process tech, i.e. 22nm. If Intel wrests Apples ARM CPU fabrication business away from Samsung - who competes with Apple on smartphones - then Intel would become a world leader in ARM CPU fabrication and pay ARM plenty of licensing fees!

Hardly the end of the world for ARM.

[bradly]

Anyone know if the 3D structure is patented by Intel? If so, wouldn't this give Intel a monopoly on transistors given how much better this new design performs?

[megaframe]

No this design was developed back when I was in college, the revolutionary change here is that Intel has a process to actually manufacture these things effectively and get decent yield. IBM had these things built in test cases back in 2007 but didn't have a manufacturing method.

Intel will likely not patent or reveal the manufacturing method thats how most semiconductor manufacturing technologies go. They tend to be trade secrets that are a combination of process and machinery which your competitors are unlikely to ever reproduce exactly, so no point in patenting it.

[cninja]

Intel doesn't have a monopoly on the technique, just a big technological head start. From the Anandtech article on this:"Intel isn't expecting its competitors to move to a similar technology until 14nm."

[jacquesgt]

I don't know if it's patented, but TSMC is apparently working on deploying the technology (according to the NYTimes article linked above). So, there are definitely people who think that Intel doesn't have a monopoly on the design.

Plus, there's far from a consensus that this is the best design out there. It hasn't been proven in mass production yet. STMicroelectronics, a massive player in microcontrollers (which often go into applications with even tougher power constraints than mobile phones), is pushing Silicon on Insulator pretty for their next generations.

[ravimc]

TSMC has plans to develop similar(not same) non-planar fab at 12nm, I think, by 2012. They call their's FINFET and showed a prototype in 2002.

http://en.wikipedia.org/wiki/Multigate_device#FinFETs

[FrojoS]

Looking at these pics http://www.nytimes.com/imagepages/2011/05/05/science/05chip_... its almost impossible to not get the feeling, that we are still in the stone age and a bright future lies ahead of us.

[nextparadigms]

I think this will mostly help increase the life expectancy of the Moore's Law by another 10 years or so. When we'll get to 11nm or whatever is the limit, we'll just start stacking layers of transistors on each other. That will only work until the chips become too thick, though.

[SlipperySlope]

Curious as to what clock speeds will be available when Ivy Bridge is released in the first half of 2012? If one expects a 37% performance increase at low voltages, then what would be the performance increase at standard voltage? 20% or so?

[SlipperySlope]

Anantech gives a gate-delay chart and explains that Ivy Bridge will be 18% faster at the standard voltage compared to Sandy Bridge. That might mean Ivy Bridge CPU parts at 4 GHz as compared with Sandy Bridge parts at currently at 3.4 GHz.

[vondur]

I often wonder at the incredibly small size of these chips (22nm) if the have to worry about relativistic effects of electrons "jumping".

[megaframe]

Short answer yes.

Thats how transistors work in general, but the problem is you get small enough and its like the transistors want to turn them-selfs on, luckily the smaller you go the more leakage you get into other areas of the chip so those extra electrons just get seeped into there and ground out which mostly causes you to pull more power per square area.

You real issue is if those "jumping" electrons get wedged into corners near gates, then they can leave a transistor on permanently. But that's all part of the chip design process to avoid that kind of thing.

[nightlifelover]

The quantum tunneling effect [1] is what you are referring to, right?

[1] http://en.wikipedia.org/wiki/Quantum_tunnelling

[jnhnum1]

yeah, they do. but those aren't relativistic effects, they're quantum effects.

[deweller]

A couple of highlights from the article:

"The key to today's breakthrough is Intel's ability to deploy its novel 3-D Tri-Gate transistor design into high-volume manufacturing."

"The 22nm 3-D Tri-Gate transistors provide up to 37 percent performance increase at low voltage versus Intel's 32nm planar transistors."

[acgourley]

"Moore's Law" is mentioned 14 times.

[pjscott]

I predict that, two years from now, it will be mentioned 28 times. And so on, doubling every two years. I call this trend "Moore's Law," because all such trends are eventually mislabeled as Moore's Law.

[JacobAldridge]

I wonder if Gordon Moore had worked for IBM instead of being an Intel founder, whether that number may have been a slight bit smaller.

[bryanallen22]

I don't mean to trivialize this, but "reinvent" sounds a little strong to me. This is a modification on silicon design, and a great one, but is just another notch in the miracle of Moore's law. It's more evolutionary than revolutionary.

See 2007 for a similar announcement and reaction:

http://hardware.slashdot.org/story/07/01/27/1614207/Intel-IB...

[schmittz]

Although not the link for this story, the fact that this story broke in the NYT (not that surprising), with an explanation to attempt transistor design and functionality (incredibly surprising) is really uplifting. A good piece of purely anecdotal evidence against those who claim America is in perpetual intellectual decline. The general populace IS interested enough to try to understand complex ideas.

[slackerIII]

Will this allow them to increase clock speeds? They mention a 37% perf increase, but I don't know what exactly they mean by that.

[riledhel]

Clock speed is just another metric, not the most important one. You also have chips that do several operations per clock cycle, low power consumption chips, chips that do parallel processing. All these factors affect performance as well.

[tspiteri]

I would think that they are talking about clock frequency. They do say that you can either have the 37% performance increase, or use less than half the power when at the same performance.

[Symmetry]

"Performance" doesn't really mean anything by itself without more details in this context, its just a vauge marketing phrase. Go look at the switching-speed/voltage tradeoff charts that pilom linked to at Anandtech to get some meaningful but still very impressive information.

[megaframe]

No, that limit has been hit by the physical structure of Silicon itself. The perf has to do with more transistors per square area, thus you could fit more "cores" into a single chip or for example, it takes me 2mil transistors to make a 5 clock cycle multiplier but I could get a 1 clock cycle multiplier if I used 5mil transistors. I didn't use to have the physical real estate to do it, now I would, so I'd do the same operation in 1/5 the time.

[makmanalp]

"the world's first 3-D transistors, called Tri-Gate, in a production technology"

I wonder if this is truly Intel's invention or not:

http://scholar.google.com/scholar?hl=en&q=tri+gate+trans...

[zosi]

All of those papers either post-date Intel's announcement from 2003 regarding tri-gate transistors, or are written by Intel employees. That search also brings up multiple patents held by Intel on the technology.

[tel]

There's an enormous difference between writing a paper on a design and prepping up to produce them at Intel's scale. Even if they didn't invent the object, they invented the processes to make it a reality outside of a lab.

[dantle]

If you're ever wondering if Intel invented something related to transistors, the answer is probably yes.

[csomar]

The world's first in a production technology

[DonnyV]

Its funny how at the end of the day basic shapes are still an important rule in technology :-)

[GavinB]

It will be interesting to see whether patents will make this a defensible innovation. Will AMD et all have to invent a similar but materially different technology in order to keep pace?

[sosuke]

Considering Intel first announced the Tri-Gate tech in 2002 AMD would have to had been working on something for 9 years to be launching a competitor anytime soon.