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kanox | 5 years ago
IP blocks inside the SOC itself usually just expose their registers on an AXI bus with no enumeration support at all, this is most likely the case with the M1 gpu.
kanox | 5 years ago
IP blocks inside the SOC itself usually just expose their registers on an AXI bus with no enumeration support at all, this is most likely the case with the M1 gpu.
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