These days it feels like all the major sites rush out the reviews right before launch day with less than a day of actually testing being done. The reviews often sound like just a re-hash of the press release specs.
I, as I assume most on this site, only considers Anandtech the one true tech product reviewer on the web. The only other equal is John Siracusa's review of the latest Mac OS release.
Anandtech does awesome in-depth reviews but most of the stuff they are talking about is not relevant to the average consumer in the slightest. If other sites were all doing that many would not be relevant to their readers interests.
The "Apple A5" SoC still uses ARM Cortex-A9 cores like nearly every other mobile SoC. Only one that doesn't is Qualcomm's Snapdragon, which uses their custom (but still based on ARMv7 like the Cortex chips) "Scorpion" design, soon to be succeeded by "Krait". They're still ARM though, the difference isn't near as drastic as PPC v. Intel; it's closer to Intel v. AMD.
No, it doesn't. It's still mostly a software issue. As you can see a dual core 1.2 Ghz GS 2 gets 3300 ms, while a dual core 1.2 Ghz Droid RAZR gets 2000 ms. And that's just the stock browser. It can even get 1300 ms in Firefox.
The A5 still uses 2 Cortex A9 cores. Whatever optimizations Apple has done to it will have a minimal impact on performance. The biggest gains will still be obtained on the software side.
As others have said, unless you're only changing one element in the hardware/software stack, it's not an apples-to-apples comparison. However, A5 is reported to use out-of-order execution, whereas A4 and earlier iPhone CPUs are purely in-order. Integer ALU pipeline length has reportedly also been reduced. The memory bus clock has also been doubled. All else being equal, a single A5 core should therefore beat the A4 on identical code. With a different JS engine on a different browser running on a different OS, I doubt these architectural effects will be noticeable.
Overall a good article. Though it's got this whopper:
A DRAM package is then stacked on top of the SoC. Avoiding having to route high-speed DRAM lines on the PCB itself not only saves space but it further reduces memory latency.
Uh... come again? DRAM latency is a function of the analog circuit inside the chip, not the wires you connect to it. At best, you might be able to drive the chips at a higher transfer frequency (but even then, the limit is probably on-package in the DRAM, not due to board trace problems). But that has at best a minimal effect on latency (you're shrinking the handful of transfer cycles at the end of the read).
The advantage of the PoP configuration is precisely that it saves space -- quite a bit of space, and it's a great trick. But this bit is just way off.
johno215|14 years ago
These days it feels like all the major sites rush out the reviews right before launch day with less than a day of actually testing being done. The reviews often sound like just a re-hash of the press release specs.
technoslut|14 years ago
ugh|14 years ago
barredo|14 years ago
ConstantineXVI|14 years ago
nextparadigms|14 years ago
The A5 still uses 2 Cortex A9 cores. Whatever optimizations Apple has done to it will have a minimal impact on performance. The biggest gains will still be obtained on the software side.
ZeroGravitas|14 years ago
Though the shift from A8 to A9 and single to dual core and the emphasis on GPU means the CPU speed isn't the key metric it might have once been.
pmjordan|14 years ago
ajross|14 years ago
A DRAM package is then stacked on top of the SoC. Avoiding having to route high-speed DRAM lines on the PCB itself not only saves space but it further reduces memory latency.
Uh... come again? DRAM latency is a function of the analog circuit inside the chip, not the wires you connect to it. At best, you might be able to drive the chips at a higher transfer frequency (but even then, the limit is probably on-package in the DRAM, not due to board trace problems). But that has at best a minimal effect on latency (you're shrinking the handful of transfer cycles at the end of the read).
The advantage of the PoP configuration is precisely that it saves space -- quite a bit of space, and it's a great trick. But this bit is just way off.
unknown|14 years ago
[deleted]