[cmroanirgo]

I've been a long time away from CPU architecture, but isn't it time that instructions are added that target the caches so that they only fetch the size of the data allocated? That way there's no leaking of errant memory? Or did I completely misunderstand the problem set (which is likely)?

So far in our languages we have two bits of information, the start pointer and the size (the latter being stored as a variable, or intrinsically as a block size), whereas the OS/framework itself often only needs the pointer...

If there was a system that allowed the tightly coupled block of memory to be represented as an op code for the caches, wouldn't that fix up all of this?

[sbf501]

An instruction wouldn't fix that, right? The cacheline fetched by the memory controller would still contain leaked data. Perhaps a fill cacheline with zero on invalidate...