[whichquestion]

The "3nm process" has no bearing on the actual size of the gate's or anything like that and is purely a marketing term.

https://en.wikipedia.org/wiki/3_nm_process gives a reasonable summary in its introduction.

My remembrance of the specific quantum effects that you're thinking of are from quantum tunneling[1] of electrons. The problem occurs when the gate size gets small enough that electrons can pass through without the transistor being switched on, which starts to happen around 3nm.

[1] https://en.wikipedia.org/wiki/Quantum_tunnelling

[fulafel]

Interesting that in the WP article it says the gap between the name and the feature size is already ~ 1 order of magnitude:

> a 3 nm node is expected to have a contacted gate pitch of 48 nanometers and a tightest metal pitch of 24 nanometers

[kayson]

The name used to correspond to the minimum gate length down to ~14nm. But the smallest feature size in 3nm (i.e. minimum gate length) is certainly much smaller than 24nm.

[gentleman11]

Dumb question: how come that isn’t fraud?

[daniel-cussen]

Because anybody buying at an industrial level is wise to it being untrue at a gate length level. Plus it's easily available to consumers that the gate length isn't that size. Plus it's bullshit that at some level everybody buys, even Intel and TSMC in some roundabout way, at the highest levels for sure, though not at the ground level. At the ground level even eg 180 nanometer has virtues that 28 nanometer lacks, it's totally different things, different texture different everything, the graybeards know. They know. Then there's different radiation resistance but that's too obvious.

So if everybody believes in the nanometers, nobody cares.

Until you hit a wall.