[stew-j]

> Does nothing well except generate heat.

Like the current GPUs running my application?

I wish you would directed that to my comment above. I would reassert that something like this, perhaps with the qualification of it being well engineered and efficient, is what I would like to run my graphics application on--a highly parallelizable algorithm but with need for a general ISA, recursion, and 64 bit floats--and the ability to get rid of CUDA and OpenCL. Given this, do you have any suggestions for something better? And why?

[imtringued]

Well obviously the correct answer is to abandon the von Neuman architecture and start processing in memory instead of burning more and more watts.

"Each UPMEM PIM DIMM contains 128 DPUs each communicating at 1GB/s with their 64 MB of memory for a total of 160 GB of PIM memory. The DPU is a 24 threads, 32-bit RISC processor – with 64-bit capabilities – working at 450Mhz (soon 600Mhz). A dual socket cascade lake server totalizes up to 2560 DPUs while the upcoming Ice Lake platform will welcome up to 28 PIM DIMMS, that is 3584 DPUs."