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sjcoles | 3 years ago
I am very curious the yield and number of masks required.
This article outlines struggles Intel had with multipatterning and 10nm on DUV.
https://www.eetimes.com/intels-10nm-node-past-present-and-fu...
E: Furthermore, I don't think SMIC has any packaging technology that would allow them to leverage chiplets.
rowanG077|3 years ago
anhphamfmr|3 years ago
HyperSane|3 years ago