[miratrix]

The papers I've seen point to values larger than 15~30% - I've seen ~50% cited for geometries as large as 65nm, only to get worse as we go to even smaller feature sizes. [1]

Threshold voltage is not really an effective knob, unless you assume that the feature size to be a knob and go against Moore's law, or that brand new, once in 10-years process innovation is a knob that designers can pick out of a hat. I don't think anyone's clamoring for return to 130nm parts on a smartphone. At each new process node, you're going to lose out on the amount of control you'll have over Vth.

This is basically what Intel did with the tri-gate transistors which gives them longer lease on life until they bump against subthreshold leakage. TSMC is on their first generation high-k metal gates, and still a process node or two away before jumping over to the tri-gate party.

1. http://www.eetimes.com/design/eda-design/4211228/Overcoming-...

[microarchitect]

If you're referring to this graph [1], that comes from an ITRS prediction. These predictions seem to be made assuming that we'll scale feature sizes assuming everything else will stay the same, which of course, is never the case. I wouldn't read too much into them. BTW, ITRS is famous for making ridiculous predictions like we'll using 15GHz by 2011.

[1] http://www.eetimes.com/ContentEETimes/Images/Design/Prog%20L....

Threshold voltage is not really an effective knob

Why is it not an effective knob? Most modern designs include sleep transistors in an attempt to not leak when a circuit is inactive. These would not work unless we could engineer high-vt transistors.