Heh. The use of `vslidedown` was also what drew my eyes. But in my case the thoughts were "that's supposed to be a pretty slow instruction, included mostly for debuggers to use".
I wonder if they've run it on any actual RVV 1.0 hardware. I guess probably in an FPGA.
Tempted to convert that to RVV 0.7.1 and submit it...
camel-cdr|2 years ago
brucehoult|2 years ago
I wonder if they've run it on any actual RVV 1.0 hardware. I guess probably in an FPGA.
Tempted to convert that to RVV 0.7.1 and submit it...