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dev_slash_null | 2 years ago

As someone who knows only the very basics of CPU architecture, this was extremely informative, thank you. It's given me lots to read up on.

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paulmd|2 years ago

I stayed at a holiday inn express last night

(PS don't forget agner fog's microarchitecture, you might be one of today's lucky 10,000! https://www.agner.org/optimize/microarchitecture.pdf )

Consider also scihub:9780849337581 for a general overview of architecture approaches in general.

It is funny that we keep reapproaching this "barrel processor" design that the CDC 6600 started so long ago. That "Vector processor + peripheral processor" design is super interesting. Nerds are attracted to this design like moths to a fly - it has been repeated and echoed in Sun Niagara, AMD Bulldozer, Xeon Phi, and now Royal Cores/rentable units/zen4c/5c/etc. We can just make one thing run fast, and have a bunch of workers servicing it, that are simple and slow and cheap, right?

https://cs.uwaterloo.ca/~mashti/cs850-f18/papers/cdc6600.pdf

https://archive.computerhistory.org/resources/text/CDC/cdc.6...

http://www.bitsavers.org/pdf/cdc/cyber/cyber_70/60045000_660...

http://ygdes.com/CDC/cdc6600.html

Very interesting source material etc, see how they talked about their own processors. A lot of older systems were exhaustively documented and the info is available now.

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https://en.wikipedia.org/wiki/UltraSPARC_T1

https://en.wikipedia.org/wiki/Xeon_Phi#Knights_Landing

tibbydudeza|2 years ago

Thanks - this will take me a while to digest :).