[itcrowd]

> digital signals have to propagate through multiple layers of logic gates, so the transistors have to switch much faster

I don't think this is accurate. Are you saying that in digital computers each individual transistor switches faster than the clock rate of, say, 3 GHz? I think there is one clock signal that is distributed to all transistors and they turn on/off synchronously at this rate. The GHz number on the processor advertisement is the switching rate of all transistors, not some hypothetical 'system rate' which would somehow be much lower?? Please clarify or correct me if I am mistaken.

[xyzzy123]

I think it's easier to see if you jump up 1 level of abstraction from transistors to logic gates.

Imagine an adder made up of logic gates. The gates aren't inherently synchronous - they don't have a clock input - signals appear at their inputs and some time later propagate to their outputs.

To make the adder synchronous you need flip flops at the inputs/outputs and a clock.

If you squint a bit you can view most designs as blobs of async logic sandwiched between sync elements (gated by the clock).

We can see that a signal might have to go through a lot of gates/transistors between flip-flops and so the gates (and their underlying transistors) will necessarily need to be able to switch faster than the clock.

[rbanffy]

This is the beauty of asynchronous logic: you don't need the flip flops and the clock - you need a yes-this-is-it signal propagating along the results.

[AdamH12113]

You’re mixing up time and frequency. For a signal to propagate through multiple logic gates in one clock cycle, each gate must switch in a fraction of a cycle. That means a single gate could switch more often (higher frequency) if it were by itself. But it’s not.

(Technically, many gates do switch more than once per cycle since their inputs change at different times. But their outputs are only latched at the end of the cycle, so any extra switching is ignored.)