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Reversing the AMD Secure Processor (PSP) – Part 2: Cryptographic Co-Processor

112 points| vngzs | 1 year ago |dayzerosec.com

30 comments

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dtx1|1 year ago

I never understood why AMD is not at least making the source of these available. I would actually really like a secure cryptographic processor that's been extensively vetted and trustworthy.

DaSHacka|1 year ago

The common assumption is that their hands are tied on that matter.

shrubble|1 year ago

Many believe it was not added as a result of customer requirements, but that the government leaned on them to add it as a tool of surveillance.

mrweasel|1 year ago

How popular is AMDs PSP, or Intels IME for that matter, in the real world. I've never seen either used at all.

bri3d|1 year ago

There are several functionalities provided by these systems:

* System Control Processing. This means that the PSP / ME handle early boot (bringup) and peripheral management, especially in low-power and sleep modes. So from a "popularity" standpoint, 100% of systems with these processors are using them for this reason alone.

* Firmware TPM (AMD fTPM / Intel PTT). This provides the Trusted Platform Module API using a Trusted Application running in the management engine, rather than a dedicated TPM chip. It's commonly used with Windows for BitLocker, especially on AMD platforms, and Linux users who like keeping their disks secure will use it as well. It's less vulnerable to bus snooping attacks, since on AMD it's embedded in the CPU package and on Intel nobody's reverse engineered the bus interface between the PCH and the CPU to see if key extraction is possible like it is for unencrypted standalone TPM. TPM also has other uses, like Secure Boot measurement attestation (hashes) and arbitrary key enrollment, which are of course also provided by fTPM when available. From a popularity standpoint this is used on 100% of modern AMD systems running Windows 11.

* Virtual Machine encryption/isolation (AMD SEV for example).

* Widevine L1 video DRM support on Chromebooks. I think it might also be used for PlayReady on Windows, but I'm less familiar with this system.

* Custom TrustApps. AMD PSP provides a standard GlobalPlatform / ARM TEE (Trusted Application Environment). I'm not aware of anyone besides Google (Chromebooks use it for trusted boot, SecureDebug validation, Widevine, etc.) actively using it in widespread deployment yet, but I'm sure someone is working on it. It has application basically anywhere Intel SGX was used, for example, for secure / segregated key management, data processing, etc. (Signal use SGX extensively for this).

* Remote management (Intel vPro). This is the thing that causes people to freak out about Intel ME. It's somewhat popular in enterprise beige-laptop deployments, although it's limited to network interfaces with driver support in the ME firmware (Intel Ethernet and WiFi). Arguably more bug-ridden and horrible external third-party management engines like iDRAC are still more popular in the datacenter.

cesarb|1 year ago

It's mentioned in part 1 of this post, that the PSP is what actually boots the processor (among other things, it sets up the memory controller), so it's used in the real world every time you turn on your AMD-based computer.

transpute|1 year ago

In addition to system launch integrity, they are likely used by streaming video DRM, e.g. Netflix.

almostgotcaught|1 year ago

the PSP is on every single AMD SoC (probably going back 10 years now).

eqvinox|1 year ago

(genuine question, sorry -) is it just me or does anyone else have problems reading the text with the font the webpage uses? It kinda blurs away from "text" into kind of a grey block. I think it might be the very small vertical line to line spacing?

zote|1 year ago

It's the contrast!, all the code blocks do not meet the WCAG standards for accessible text, especially the second one, which as the hardest one for me to read.

kdbg|1 year ago

Author of the site here (though not this specific post).

Any chance you could take a screenshot of what your seeing? The other commenter mentioned the contract of comment s in code blocks which I've already noted to fix.