[zoenolan]

Just some links I had lying around. Well at least the ones that still worked.

A major problem I had was register pressure. Even with a decent sized register file. Memory accesses in the hundred of cycles range, made it very difficult to fill those 'free' cycles while you are waiting for data to be loaded. Double buffering data really just cut the effective size of the register file making everything worse. That did lead to some interesting way of optimising code to reduce temp storage over execution time.

Another was trying to access different memory locations and getting poor usage of the cache. Giving larger gaps to try and fill with something useful.

This was sometime ago now. So the tradeoffs will be different. Different types of RAM and transistor budgets