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blackenedgem | 1 year ago
TSMC's 7nm where they jumped ahead of Intel used quad-patterning DUV which is also what Intel was trying. TSMC only started to introduce EUV at 6nm and 5nm which is when ASML had made great breakthroughs and vastly increased WPH. And even then EUV was only used sparingly at the most critical layers. Because other problems were still being solved like uptime and compatible pellicles.
If you want to blame Intel's decisions then look at their use of cobalt contacts or COAG use. They tried to do too much at 10nm when shrinks were getting harder.
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