(no title)
XzAeRosho | 1 year ago
>Excluding interconnects, the SRAM and CCD should add up to less than 20µm thick. To accommodate such small and fragile components, AMD has added a bulky layer of dummy silicon at the top and the bottom for structural integrity.
MoreMoore|1 year ago
Tuna-Fish|1 year ago
The way nearly every CPU starting right from 4004 has worked is that they take a silicon wafer that's about half a mm thick, do a lot of photolithography, etching, deposition and other stuff to build the cpu on the top side of it, flip it upside down and bond it to the package. Only the very surface layer of the silicon is active in any way, the rest of the bulk is used for structural support and spreading heat laterally (necessary because heat is not evenly distributed at all, the hot spots get very hot). Power and signals come from the package below, heat is dissipated to the top.
The x3d chips change this, because in it there are two silicon dies bonded together, right on top of each other. The lower one of these dies gets through-silicon vias built into it, so it can provide power and signals for the top one. In prior generations, there was a normal CPU on the bottom, and they put the cache chip on top. For Zen5, they reversed that.
A complication is that apparently the process they use to bond them requires the top chip to be thinned. This means it's structurally weak and that heat spreads worse laterally, which would be bad for top clocks. So they bond another, thicker piece of silicon on top of it.
hnuser123456|1 year ago
rcxdude|1 year ago
tecleandor|1 year ago