[sirdarckcat]

> This probably depends on a lot of non-public info: how does the PSP validate CPU state?

https://github.com/amd/AMD-ASPFW/blob/3ca6650dd35d878b3fcbe5...

[amluto]

That seems to be reading a memory mapped register per core. I wonder what backs that register.

[sirdarckcat]

It's just written by the CPU during a ucode update