Great release with many welcome features. As a nit, I'm rather disappointed at the inclusion of fixed-size SIMD (128-bit wide) instead of adaptive SIMD instructions letting the compiler maximize SIMD width depending on host capabilities, similar to how ARM SVE works.
lifthrasiir|9 months ago
camel-cdr|9 months ago
New x86 processor don't executes 128-bit SIMD, the vecto ALUs are all wider now and 128 and 256-bit instructions have the same throughput and latency.
Also, do you have an example for such "opportunistic" usages?
I suppose mainly things the SLP vectorizer can usually do already (in compiled languages, I'm not sure how good the JIT is these days).
I worry that we now may end up in a world, where "hand optimized SIMD" in WASM ends up slower than autovectorization, because you can't use the wider SIMD instructions and leave 2x (zen4) to 4x (zen5) of the performance on the table.
aseipp|9 months ago
singularity2001|9 months ago
https://github.com/WebAssembly/flexible-vectors
subarctic|9 months ago