[throwawayabcdef]

No need. I gave ChatGPT this prompt: "Write a data mover in Xilinx HLS with Vitis flow that takes in a stream of bytes, swaps pairs of bytes, then streams the bytes out"

And it did a good job. The code it made probably works fine and will run on most Xilinx FPGAs.

[pjc50]

> The code it made probably works fine

Solve your silicon verification workflow with this one weird trick: "looks good to me"!

[throwawayabcdef]

Its how I saved cost and schedule on this project.