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Remnant44 | 6 months ago

ARM instructions are fixed size, while x86 are variable. This makes a wide decoder fairly trivial for ARM, while it is complex and difficult for x86.

However, this doesn't really hold up as the cause for the difference. The Zen4/5 chips, for example, source the vast majority of their instructions out of their uOp trace cache, where the instructions have already been decoded. This also saves power - even on ARM, decoders take power.

People have been trying to figure out the "secret sauce" since the M chips have been introduced. In my opinion, it's a combination of:

1) The apple engineers did a superb job creating a well balanced architecture

2) Being close to their memory subsystem with lots of bandwidth and deep buffers so they can use it is great. For example, my old M2 Pro macbook has more than twice the memory bandwidth than the current best desktop CPU, the zen5 9950x. That's absurd, but here we are...

3) AMD and Intel heavily bias on the costly side of the watts vs performance curve. Even the compact zen cores are optimized more for area than wattage. I'm curious what a true low power zen core (akin to the apple e cores) would do.

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mycall|6 months ago

When limited to 5 watts, the Ryzen HX 370 works pretty darn well. In some low-power user cases, my GPD Pocket 4 is more power efficient than my M3 MBA.

aurareturn|6 months ago

We are going to need to see some numbers for your claim. That’s not believable.

happymellon|6 months ago

We will need some citations on that as the GPD Pocket 4 isn't even the most power efficient pocket pc.

Closest I've seen is an uncited Reddit thread talking about usb c charging draw when running a task, conflating it with power usage.

mmcnl|6 months ago

How about single-core performance?

ozgrakkurt|6 months ago

But is the uOp trace cache free? It surely doesn’t magically decode and put stuff in there without cost

Remnant44|6 months ago

For sure.. for what it's worth though, I have run across several references to arm also implementing uop caches as a power optimization versus just running the decoders, so I'm inclined to say that whatever it's cost it pays for itself. I am not a chip designer though!

saati|6 months ago

Zens don't have a trace cache, just an uop cache.