top | item 45056813 (no title) supersour | 6 months ago I'm not familiar with GPU architecture, is there not a shared L2/L3 data cache from which this data would be shared? discuss order hn newest reliabilityguy|6 months ago MMU has a finite amount of ports that drive the data to the consumers. An extreme case: all 32 cores want the same piece of data at the same time.
reliabilityguy|6 months ago MMU has a finite amount of ports that drive the data to the consumers. An extreme case: all 32 cores want the same piece of data at the same time.
reliabilityguy|6 months ago