Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

[yoan9224]

This is absolutely wild. Rendering graphics with just combinational logic and no frame buffer is the kind of constraint that breeds creativity.

The HAKMEM sine/cosine generator is such an elegant choice - it's numerically stable in fixed-point and requires only adds and bit-shifts. Perfect for hardware. I used a similar approach once for generating test patterns in an FPGA.

The fact that you can iterate on this in simulation, then deploy to actual silicon via Tiny Tapeout for $150 is honestly mind-blowing. We're living in the future.

[tails4e]

How does this compare to CORDIC for sin/cos generation? Which is more accurate, etc ?

[zahlman]

> The fact that you can iterate on this in simulation, then deploy to actual silicon via Tiny Tapeout for $150 is honestly mind-blowing. We're living in the future.

It's really cool but it doesn't seem practical at all. They aren't setting up print runs, just one-offs (https://tinytapeout.com/faq/#how-many-chips-will-i-receive-c...) and $150 could get you... many orders of magnitude more power than that.

... For that matter, apparently the microcontroller in the dev kit is a https://en.wikipedia.org/wiki/RP2040 , which seems like a beast in comparison. And it's still available for less than $1 USD on PiShop.

[xphos]

As a computer science guy who interlops in computer engineering i really want to find time to build something cool like this and tapeout. The retro architectures for rendering are simple but fun! I love the project

[Neywiny]

I recommend getting started like the author did: simulation first, then FPGA. Honestly FPGA will take you very far. I always get a kick out of being able to design my own SoC. "Hmmm I need 9 separate I2C ports... Ok, copy block, paste paste paste..." Or if you have an operation in software that's taking forever you can write an accelerator for it

[oofbey]

It’s amazing and wonderful to see the Internet support these tiny cliques of interest. Having everybody connected leads to homogenization of culture in some ways, but it also supports these couple dozen (?) people around the world finding each other for this amazing little competition.

[RossBencina]

I was curious about the long-term stability of the cited HAKMEM sin/cos generator. I found an overview here: https://news.ycombinator.com/item?id=3111501 (EDIT: I'm still not sure about stability, apparently it is stable in exact arithmetic under certain conditions.) Coincidentally it is related to the Verlet integration video I posted last week: https://news.ycombinator.com/item?id=46253592

[a1k0n]

Yeah, it is exact in this specific circumstance. But yes, it's exactly the same trick; I also enjoyed that video in my Youtube recommender feed last week!

[intalentive]

I like how the grid pulses with the kick drum. Nice touch.

[glimshe]

Reminds me of college: "Hardware and Software are logically equivalent"

[amelius]

Writing hardware is like writing software except parallelism is way cheaper, but mistakes are way more expensive.

[Joel_Mckay]

Whoever said that was mistaken... or worked at Intel. lol =3

https://en.wikipedia.org/wiki/Metastability

https://en.wikipedia.org/wiki/Clock_domain_crossing

[xecaz]

Wow, nice work!! Coming from demo/intro coding where you have memory and a driver for audio(x86), this is very impressing.

[startupsfail]

Wow, I'm looking at current "Open Shuttles", a license to use 4KB of SRAM in the project is $2500. But it comes with Wishbone Bus interface!

> 1024x32 Commercial SRAM > CF_SRAM_1024x32 > Commercial SRAM: 1024 words x > 32 bits (4KB) with Wishbone Bus interface > Area: 0.17mm² > GPIOs: 0 > License: Commercial - $2500 per project

[Archit3ch]

I'm tempted to put together an FPAA with Tiny Tapeout, but it likely won't fit in the allocated area.

[Taniwha]

TT allows you to pay more and build multi-block designs

[Joel_Mckay]

Check the switching speed specification, and shared i/o bank configuration.

The project has a narrow scope of use-cases. =3

[idiotsecant]

No x, no y, just Z is a pattern so often used by chatGPT it has started to bleed into common usage by people who maybe aren't even using an LLM.

[layer8]

Or maybe ChatGPT picked it up from common usage.

[peddling-brink]

Language is fluid. This is ok.

There are many bad things about LLMs, but a benign shift in popular language usage isn't one of them.

[fsckboy]

when i was running for 5th grade class president a number of decades ago, my campaign sign slogan was a "no x, no y, just z" snowclone.

[anthomtb]

For everyone who is as dumb as I am, the comment pertains to the title.

x=CPU y=Memory Z=4k gates

[BoredPositron]

Reminds me of the time we repaired old pinball machines in trade school. Good times.

[datameta]

Very impressive stuff. I used to frequent the JS demoscene, mostly dwitter - but this is on a whole other level.

Oh shit, this prompted me to check and turns out TinyTapeout is back to life! https://tinytapeout.com/

[openinfrared]

Really cool!

[Dwedit]

If you have registers, it's not "no memory".

[hackernudes]

If you have flip flops, it's not "no memory".

If you have a ROM, it's not "no memory".

Needlessly pedantic!

I thought this was pretty cool but the first video didn't play. All this write up and I really just want to see the damn demo in action first! (Edit: reloaded the page and it worked. I still would like to see it on rela hardware!)

[jonathrg]

And I better not see any capacitors on there remembering any charge!

[layer8]

Even simple wires can be memory: https://en.wikipedia.org/wiki/Delay-line_memory#Electric_del...

[fsckboy]

>Pure Silicon Demo Coding: No CPU, No Memory, Just 4k Gates

ok, but silicon is doped so it's slightly impure, and CPUs are also silicon and memory is also silicon.

you actually meant "4K gates, no clock, no synchronization, no timing" and maybe a little "not exactly sure when the output is rea... is rea... is ready"

[chrisjj]

There is sync and there is timing. Else there'd be no meaningful image.