Some upcoming chips are supposed to support switching individual processes to x86's "TSO" memory model. That might be the most significant extension that Apple has for x86 emulation: it allows eliding all memory fence instructions used to adapt to the weaker memory model.
LoongArch could have instructions that emulate specific x86 behaviour and flags, but there is practically no documentation available.
Is it just "some upcoming chips" inventing their own extensions? Or is this a standardized ARM extension?
Basically, will writing against these upcoming chips mean writing one implementation for Qualcomm, one implementation for Rockchip, one implementation for Samsung, etc? Or will it just require one implementation for the standard ARM "switch to total store ordering memory model" extension
Findecanor|1 month ago
LoongArch could have instructions that emulate specific x86 behaviour and flags, but there is practically no documentation available.
mort96|1 month ago
Basically, will writing against these upcoming chips mean writing one implementation for Qualcomm, one implementation for Rockchip, one implementation for Samsung, etc? Or will it just require one implementation for the standard ARM "switch to total store ordering memory model" extension