(no title)
danhor | 1 month ago
The source code is all from Luke Wren and I don't think other cores use the source code directly, but improvements to test harnesses or general implementation patterns as well as better software support help other cores: https://github.com/Wren6991/Hazard3
For the SoCs I would expect to see an off-the-shelf Risc-V core (certainly no Hazard3 as the main CPU), but we'll see.
Findecanor|1 month ago
You're supposed to be able to just recompile most Pico projects to use them as long as there is no ARM assembly in it.
They are only inferior to the ARM Cortex-M33 cores in the Pico 2.
PunchyHamster|1 month ago
ipdashc|1 month ago
Quick edit: sounds like "basically" wasn't doing that much heavy lifting after all, wow https://www.raspberrypi.com/news/risc-v-on-raspberry-pi-pico...
sylware|1 month ago
I am curious to know which RISC-V design they'll go for in this SOC.
M. Wren getting real hard experience on RISC-V is going only to help RP to select and audit more seriously any RISC-V design which would make its way in their SOCs.
I just don't want to contribute to arm IP racketering (and we have mpeg and hdmi to take into account too with avX and eDP/DP).