[teraflop]

Cool project!

The most interesting part, IMO, is the "SRAM with EEPROM backup" chip. It allows you to persistently save the clock hands' positions every time they're moved, without burning through the limited write endurance of a plain old EEPROM. And it costs less than $1 in single quantities. That's a useful product to know about.

[ssl-3]

That's really neat. TIL.

So the way this works seems to be this: It's an SRAM and an EEPROM in one little package along with a controller that talks with each, with a little capacitor (this clock uses 4.7uf) placed nearby.

The SRAM part does all of the normal SRAM stuff: It doesn't wear out from reading/writing, and as long as it has power it retains the data it holds.

The EEPROM does all the normal EEPROM stuff: It stores data forever (on the timescale of an individual human, anyway), but has somewhat-limited write cycles.

The controller: When it detects a low voltage, it goes "oh shit!" and immediately dumps the contents of the SRAM into EEPROM. This saves on EEPROM write cycles: If there are no power events, the EEPROM is never written at all.

Meanwhile, the capacitor: It provides the power for the chip to perform this EEPROM write when an "oh shit!" event occurs.

When power comes back, the EEPROM's data is copied back to SRAM.

---

Downsides? This 47L04 only holds 4 kilobits. Upsides? For hobbyist projects and limited production runs, spending $1 to solve a problem is ~nothing. :)

[stavros]

Has anyone found the chip on AliExpress? I only get unrelated listings with that part number, but this is a pretty interesting chip I'd like to get a few of.

An alternative would be a supercapacitor and a voltage divider connected to the ADC pin of the microcontroller. When the 5V rail dies, the supercapacitor can hold 3.3V for a few seconds while you write everything to the EEPROM.

[bonsai_spool]

What's the purpose of using an LLM to write a comment here?

[sowbug]

I'm not sure if this is the same technology, but regardless it's also cool: https://www.adafruit.com/product/1897

[mftrhu]

Not quite - the chip the article refers to is the 47L04 [0], which is "just" NVSRAM built out of a RAM + EEPROM. I do agree on FeRAM being cool, though - I have a few I2C chips en route, and I can't wait to get my hands on them.

[0] https://www.microchip.com/en-us/product/47L04

[pjc50]

FRAM is extremely neat on paper, combining SRAM ish speeds with non-volatility, but adoption seems to be low. Possibly due to scaling issues. I've had a FRAM-based TI MSP430 in my random parts drawer for about a decade.

[monocasa]

I do like the frams too for similar use cases.

Particularly I like that I can get those large enough to stick a ring buffer from debug out on them as well and get crash logs from embedded systems despite the debug uart not being tethered to a dev machine.

[harvie]

i think it's called EERAM, however having proper closed loop control with hand position feedback would be preferable in my opinion...

[the_fall]

Meh. The room-temperature endurance of modern EEPROMs (e.g., ST M95256) is something like 4 million cycles. If you use a simple ring buffer (reset on overflow, otherwise just appending values), you only need to overwrite a cell once every 32k ticks, which gives you a theoretical run time of 250,000 years with every-minute updates or 4,100 years with every-second updates.