It has to do with small amounts of leakage current on the device level. If you just use 1 type of transistor (p or n -type) then when you change from on/off or off/on you will lose more current than if you use both types in your circuit. Sum this across billions of transistors and the equation starts to make sense.
Can you explain what the importance of this leakage is? Electricity costs 'power-wise' it makes sense but are there other reasons to want to avoid transistor leakage?
Disclaimer: Not a hardware guy but am utterly fascinated, ooh's and ahh's may spontaneously result.
Dwolb's explanation isn't quite clear, and I tried to type an explanation as well, but the wiki page has a vastly better explanation as to the advantages of CMOS over NMOS.
Dwolb|11 years ago
williadc|11 years ago
RollAHardSix|11 years ago
Disclaimer: Not a hardware guy but am utterly fascinated, ooh's and ahh's may spontaneously result.
kabouseng|11 years ago
http://en.wikipedia.org/wiki/NMOS_logic