[scottchin]

Thinking about this topic some more, it seems hard to gain the critical-mass of contributors for such an open-source tool.

Place-and-route for example, requires a very specific set of knowledge in both optimization (comp-sci), and hardware (electrical). Most of the people who have these skill sets are probably already employed by the major FPGA vendors and under NDA to not contribute to such an open-source tool. I've seen this first-hand having been in the academic space of FPGA research. New masters and phd grads typically go straight to Xilinx or Altera. And without really really good place-and-route, you won't have a competitive tool.

I'm not sure how you would solve this problem.

[diamondman]

OP here

This is a severe problem that saddens me greatly. For now I am just writing tools to make JTAG/SPI/etc loading of chips Ubiquitous to the developer writing software/netlists for them. I do not know enough about the place and route math and routines, nor have I seen enough details of real life chips to know the types of real challenges faced. But I will cross that bridge when I get there (maybe it will be someone else :)).

I personally have a huge issue letting anything fundamental I figure out be marked down as the property of a company to have and hold for 20+ years. But I understand the financial rewards and interesting problems are more than enough for many people, so I can not hold it against a student with a PHD worth of debt to need cash. Sigh.

Hopefully if a good enough extensible base exists, people will add pieces on (whatever they can get away with) over a long time. That is all I can really hope for.