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foft | 2 years ago | on: Ask HN: What is the least obnoxious way to ask for cookie permissions?

Cookie permissions and EU advertising options should absolutely be built into the browser, it makes no sense for the user to have permissions on each site individually like this with a different system on each one.

Then the user can centrally review what permissions they gave, revoke them etc.

So no sites should have these kind of approval banners.

foft | 3 years ago | on: Intel announces new FPGA families

I did mean 25% faster, though it was a guesstimate. That was comparing Agilex to Agilex D, not Cyclone V to Agilex D.

FPGA logic in simple terms consists of LUTs (look up tables, used to implement gates) and registers. The LUTs can be chained several times until they connect to a register. Registers are clocked at a frequency.

Now the max frequency is calculated using the maximum time from a register output, through a bunch of LUTs to reach another register. So it depends how long the chain is.

Its more complex than that in reality since there is also the time for the clock to propagate and to route the signals around. Fortunately the software takes care of that.

I don't really know how maximum frequency is specified in the specs, but I guess it'd be something like an ideal register->single LUT->register without much routing.

foft | 3 years ago | on: Intel announces new FPGA families

I'll try to answer this, though my direct experience is only with Cyclone and Max 10.

The Mister uses the Cyclone V 5CSEBA6U23I7 built on TSMC 28nm. It has 110000 logic elements and also a hard ARM.

These are on Intel 7, so there a significant process improvement.

The smallest Agilex D has the same number of logic elements(1) and the largest has 6x as many (2). Note that Agilex tends to be much more expensive than Cyclone.

Realistic maximum clock rates on the Cyclone V are 50-200MHz, depending on the length of the combinational logic chains. For the Agilex I think that it is more like peak 600MHz. So I would guess say 25% faster and say peak 750MHz?

As to fitting all the logic for n64/PS2, I don't know!

1) Comparing these directly is not quite accurate.

2) https://www.intel.com/content/www/us/en/products/docs/progra...

foft | 3 years ago | on: Intel announces new FPGA families

If anyone is Intel in reading this, please can you provide a lead-time for the low end FPGA (e.g. Cyclone V and Max 10) to Mouser and Digikey?

I understand there is an ongoing major chip shortage but it has been over 2 years and historically these were available next day. I'm sure that I'm not the only one waiting for years with finished designs and no information.

I asked Digikey and they told me that Intel do not provide them with good communications, such that they cannot even populate this, never mind to provide a lead time per product. https://www.digikey.ch/en/resources/reports/lead-time-trends

foft | 3 years ago | on: Ask HN: Apple dropping support for iPhone SE. What to do now?

Wow, about 3 days after my five year warranty ran out. They don't hang about do they!

I was planning to keep it running until the next Apple phone with 3.5mm jack. Are there any 3rd party companies providing security updates to keep such working hardware running?

foft | 3 years ago | on: MiSTer FPGA: Recreate classic computers using modern hardware

If you want to eg add original ports and hardware interfaces that tends to be easier with an fpga: cartridges, midi etc. Of course you can do that in software/ bit bang. Though it’s complicated by emulator timing, they tend to run frame by frame and sync at the end of a frame.

foft | 3 years ago | on: The Two Generals Problem

Say the enemy captures the messenger and sets the hill on fire? Bob never receives the message so Alice attacks alone.

foft | 4 years ago | on: Ask HN: Why is there a chip shortage?

Intel doesn’t seem to have enough capacity, there are no in stock intel fpgas under $2000 at Digi-Key. Try and get any cyclone v or max 10 chips.

foft | 4 years ago | on: QEMU 6.2

Great news, QEMU is really great. Will have to give this a spin on the MiSTer again. I was experimenting with emulating the 68K in qemu in combination with FPGA reimplementation of the Amiga chipset. I ran into performance issues with the way AmigaOS manages memory, where stack and code can be in the same page. Qemu seems very inefficient in that case since it constantly invalidates the translated code I think, I wonder if that aspect has been improved at all.

foft | 4 years ago | on: The Perils of M1 Ownership

Update: The Big Sur 11.5 update with the second admin user, and no primary admin home directory, worked without issue.

foft | 4 years ago | on: The Perils of M1 Ownership

I used initially 'Blackmagic disk speed test'. This tool seems to only have an option for 1-5GB. I did not find a random or sequential option. I've definitely seen screenshots of this tool giving high read speeds using the Orico.

Then I tried 'ATTO disk benchmark'. This tool tries a variety of read and write I/O size ranges. The results I got here were strange. As expected as the I/O size range grows, the read bytes/s increase. Then it hits 1MB I/O size and the throughput drops to almost 0. Write was consistent across the range, perhaps since it simply hits a buffer on the SSD to be processed later.

With dd I achieved good performance transferring a 5GB file, after a reboot to ensure the file cache was definitely flushed.

Perhaps it was an issue with the firmware version for the Orico or the SSD itself. Unfortunately I was unable to update the latter since the 'Samsung Magician' software is windows only. On my windows devices I have no thunderbolt ports.

foft | 4 years ago | on: The Perils of M1 Ownership

Interesting. I just bought an M1 Mac mini. I added a nvme m.2 ssd (Samsung PM9A1 + Orico SCM2T3-G40) over thunderbolt 3 and moved the admin user over. Unfortunately I had to send back the ssd and adaptor since it was reading at only 75MB/s for some reason. Anyway I created a new admin on the internal ssd before deleting the external ssd. If I understand this article correctly it’s saying that I will no longer be able to update since I now only have a secondary admin user. Is that correct?

foft | 4 years ago | on: Commodore 64 and Raspberry Pi 4 = Synth6581

FPGA does not really offer advantages of accuracy, though it does offer advantages in time precision. This is important when putting it inside a C64. Of course a much faster CPU can also be used to handle real cycle accuracy in sync with the original clock.

Part of the sid sound comes from the non-linearity due to approximation in its design. For example the state variable filters are very non-linear on the 6581. It even differs significantly from each individual chip to chip[1]. The best software models I'm aware of are in residfp[2] and jsidplay[3]. After some work in octave I found the filter model can be recreated without the large lookup tables used in this software.

Of course getting the digital part correct is also important. There is a lot of documentation on this resulting from the decap [4].

Some features like bitfade, multiple driven bits in the wave corruption etc do not translate well to FPGA. They can be approximated with timers and lookup tables.

[1] Filter response chart: https://csdb.dk/forums/?roomid=14&topicid=105719

[2] residfp: https://bel.fi/alankila/c64-sw/index-cpp.html

[3] jsidplay2: https://haendel.ddns.net/~ken/

[4] Sid internals: https://sourceforge.net/p/sidplay-residfp/wiki/SID%20interna...

foft | 5 years ago | on: The Framework Laptop

I'd be keen to make an FPGA based custom cpu board to go in, presuming they release port pinouts, timings and signalling details. This could be used for hardware laptop versions of legacy computers - Amiga, ST, Atari 800XL etc. Particularly if there is a slot for custom external ports to be exposed.
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