texse's comments | WingNews

texse | 5 years ago | on: Eagle Cash

If someone can round up 51% of Bitcoin's miners and hold them at gunpoint, then they have full control over Bitcoin's rules.

Well over 51% of bitcoin mining happens in China, so Xi Jinping can probably change Bitcoin's rules tomorrow if he desires.

texse | 5 years ago | on: Eagle Cash

Technically FLP impossibility only applies to deterministic algorithms, not randomized ones, otherwise no consensus protocol would work. So you could imagine a complicated technical solution that could work (eg. treating everything as a big Raft cluster and using Raft's membership changes every time a device is connected / disconnected).

In practice the solution is to realize that failures are rare (especially compared to events like the soldier simply misplacing the card), and to have a trusted human available to resolve any issues that do occur.

texse | 5 years ago | on: Undocumented arm64 ISA extension present on the Apple M1

These instructions are not for the Neural Engine. That is a separate hardware block outside of the CPUs. Apple refers to this feature as "AMX" in their marketing documentation.

While AMX could be used for deep learning in a pinch despite the lack of support for common formats like fp16 and int8, I suspect Apple had some other use cases in mind as well. For example, 64-bit float support is expensive and generally useless for ML. However, they are useful (though not necessarily required) in problems such as bundle adjustment that may appear in the context of frameworks like ARKit.

texse | 5 years ago | on: Fujifilm Created a Magnetic Tape That Can Store 580 Terabytes

Most recent tape standards have multiple "bands" and "wraps" placed in parallel. The head reads only one wrap at a time, so it takes many passes to read the whole tape. For example an LTO-8 tape has 52 wraps each within 4 bands, requiring 208 passes to read completely.

texse | 5 years ago | on: Apple Silicon M1 Die-Shots

It may be interesting to look at a more completely labeled die image (eg. a recent AMD laptop chip [1]).

I/O controllers, various PHYs, the display pipeline and the media engine account for a significant fraction of chip.

We also know the M1 has an integrated SSD controller, ISP and Thunderbolt which probably take a good chunk of room too.

[1] https://potatopc.net/amd-renoir-die-annotation-raises-hopes-...