randrews9 | 3 years ago | on: Hyundai’s Ioniq 6 EV makes its US debut
The n vision 74 is particularly striking: https://www.hyundai-n.com/en/models/rolling-lab/n-vision-74....
randrews9's comments
randrews9 | 3 years ago | on: Hyundai’s Ioniq 6 EV makes its US debut
This doesn't feel like a complete assessment of the risk. Truck rollover risk is higher. Additionally, your risk of having a tragic collision with a pedestrian, which you would need to live with, is significantly higher.
randrews9 | 5 years ago | on: Xilinx Opens Up Vitis HLS Tool for FPGAs
See somewhat recent thread on xls:
randrews9 | 5 years ago | on: Xilinx Opens Up Vitis HLS Tool for FPGAs
Totally agree. Certain signal processing pipelines that FPGAs are often targeted at map very well to HLS, often with 10x or more code reduction. Production SoCs sometimes use similar tech for less power/performance critical blocks. Mentor graphics catapult HLS marketing material contains some note that NVENC on the maxwell generation of Nvidia GPUS was coded in HLS.
randrews9 | 5 years ago | on: Xilinx Opens Up Vitis HLS Tool for FPGAs
The article mentions its the HLS frontend that was open-sourced, not the backend. I see no evidence of any HDL codegen here at all yet. I'll keep looking though.
The full HLS tool that they ship does produce full verilog/vhdl, and doesn't go to the bitstream level. It would be a huge improvement if they would open-source the whole thing. I suspect they will not, however, as code generator likely has a fairly complex FPGA Fabric/Slice timing model used to schedule operations into clocks, and that is something they would probably consider proprietary. Hopefully they can strip out those bits out and release the rest.
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