torpcoms's comments

torpcoms | 8 years ago | on: Ellen Ullman on the importance of making algorithms accessible to the public

She is only asked about it in the last question, and mentions a New York City politician wanting open source algorithms:

> Algorithms make decisions all through his borough, the East Bronx, including where children go to school, where police patrols are assigned, and the schedule for garbage pickup.

Which seems a bit bizarre, open source algorithms would be nice, but the tie in to 'the humanities' seems tenuous at best.

torpcoms | 8 years ago | on: Station X Linux Machines

> Once that has been determined, designed, and goes into production, we start on firmware.

So you use coreboot. Right? Because if you don't, where is this firmware development going on?

torpcoms | 8 years ago | on: Station X Linux Machines

I think it is probably:

* a guarantee, and support for running Linux * UK-based customer support, rather than ROC/Taiwan-based * maybe component selection that avoids certain hardware with bad drivers?

torpcoms | 8 years ago | on: Station X Linux Machines

Although as someone mentioned below, they are rebranded Clevo machines, and really were designed to run Windows first. Station X is just offering a guarantee that they will run Linux properly.

torpcoms | 8 years ago | on: Station X Linux Machines

Any idea what ODM Purism <puri.sm> uses for their components? This is exactly the sort of thing I find interesting.

torpcoms | 8 years ago | on: Linus Torvalds: “Do No Harm”

You would rather have a self driving car in an undefined state, rather than having it shut down? A random glitch could be just as bad as an exploit; if some chunk of memory gets overwritten and your car decides that the brick wall doesn't actually exist any more, I don't think whether it was an an exploit or not really matters. The occupants end up injured either way.

torpcoms | 8 years ago | on: IBM Preps Power9 for AI and HPC Launch, Forges Big NUMA Iron

The Zaius/Barreleye systems use the LaGrange chips instead; the quick breakdown I made for wikipedia was:

    Sforza —   50 mm × 50 mm,     4 DDR4, 48 PCIe Lanes, 1 XBus 4B
    Monza —    68.5 mm × 68.5 mm, 8 DDR4, 34 PCIe Lanes, 1 XBus 4B
    LaGrange — 68.5 mm × 68.5 mm, 8 DDR4, 42 PCIe Lanes, 2 XBus 4B
Though I have no idea what XBus is.

torpcoms | 8 years ago | on: IBM Preps Power9 for AI and HPC Launch, Forges Big NUMA Iron

Because there is latency and overhead involved when shuffling things to the GPU, and a lot of the focus on POWER these days is on OpenCAPI/NVLink. If there is an ARM chip fast enough to make OpenCAPI support worthwhile, I would be interested to hear about it.
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